New PDF release: 3D IC Stacking Technology

By Banqiu Wu, Ajay Kumar, Sesh Ramaswami

ISBN-10: 007174195X

ISBN-13: 9780071741958

The most recent advances in third-dimensional built-in circuit stacking technology

With a spotlight on business functions, 3D IC Stacking Technology bargains entire insurance of layout, try out, and fabrication processing equipment for three-d gadget integration. each one bankruptcy during this authoritative advisor is written via specialists and info a separate fabrication step. destiny functions and state of the art layout capability also are mentioned. this is often a vital source for semiconductor engineers and transportable machine designers.

3D IC Stacking Technology covers:

  • High density via silicon stacking (TSS) technology
  • Practical layout atmosphere for heterogeneous 3D IC products
  • Design automation and TCAD software options for via silicon through (TSV)-based 3D IC stack
  • Process integration for TSV manufacturing
  • High-aspect-ratio silicon etch for TSV
  • Dielectric deposition for TSV
  • Barrier and seed deposition
  • Copper...
  • Show description

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    Additional info for 3D IC Stacking Technology

    Sample text

    With increasing focus shifting toward heterogeneous integration of mixed technologies to realize new functional integrations—including More Than Moore technologies, memory subsystems, integration of passive components, and power/thermal management solutions—SiP can have significant advantages compared to SOC integration. In addition to providing the optimum technology for each function, SiP allows re-use of previously designed intellectual-property design components. Not only is design NRE reduced, but time to market for new products can be significantly faster compared to SOC designs.

    Via-last has applications in which the limited via density is sufficient to provide interconnect required for chip-to-chip stacking to achieve form factor reduction. Via-middle is viewed as the preferred approach for high-density TSVs in many applications, since it can provide low-resistance, high-density interconnects with orders of magnitude more connections between chips than are possible with wirebonds. This high interconnect density enables new system partitions with extreme bandwidth between chips.

    As a result of this rapidly escalating Internet traffic, huge demands are being placed on the datacenters that service the Internet. S. S. data centers used 61 billion kilowatt hours of energy in 2006 and under current trends will consume 100 billion kilowatt hours in 2011. This represents a peak load of 7 gigawatts, or approximately 25 power plants [16]. The increased use of the Internet is also dramatically increasing the carbon footprint associated with computers, which now exceeds that of the airline industry.

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    3D IC Stacking Technology by Banqiu Wu, Ajay Kumar, Sesh Ramaswami

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